Loading...
Searching...
No Matches
stm32f4xx.h
Go to the documentation of this file.
1
28
32
36
37
#ifndef __STM32F4xx_H
38
#define __STM32F4xx_H
39
40
#ifdef __cplusplus
41
extern
"C"
{
42
#endif
/* __cplusplus */
43
47
51
#if !defined(STM32F4)
52
#define STM32F4
53
#endif
/* STM32F4 */
54
55
/* Uncomment the line below according to the target STM32 device used in your
56
application
57
*/
58
#if !defined(STM32F405xx) && !defined(STM32F415xx) && !defined(STM32F407xx) && !defined(STM32F417xx) && !defined(STM32F427xx) && !defined(STM32F437xx) && !defined(STM32F429xx) && !defined(STM32F439xx) && !defined(STM32F401xC) && !defined(STM32F401xE) && !defined(STM32F410Tx) && !defined(STM32F410Cx) && !defined(STM32F410Rx) && !defined(STM32F411xE) && !defined(STM32F446xx) && !defined(STM32F469xx) && !defined(STM32F479xx) && !defined(STM32F412Cx) && !defined(STM32F412Rx) && !defined(STM32F412Vx) && !defined(STM32F412Zx) && !defined(STM32F413xx) && !defined(STM32F423xx)
59
/* #define STM32F405xx */
60
/* #define STM32F415xx */
61
/* #define STM32F407xx */
62
/* #define STM32F417xx */
63
/* #define STM32F427xx */
64
/* #define STM32F437xx */
65
/* #define STM32F429xx */
67
#define STM32F439xx
69
/* #define STM32F401xC */
70
/* #define STM32F401xE */
71
/* #define STM32F410Tx */
72
/* #define STM32F410Cx */
73
/* #define STM32F410Rx */
74
/* #define STM32F411xE */
75
/* #define STM32F446xx */
77
/* #define STM32F469xx */
79
/* #define STM32F479xx */
81
/* #define STM32F412Cx */
82
/* #define STM32F412Zx */
83
/* #define STM32F412Vx */
84
/* #define STM32F412Rx */
85
/* #define STM32F413xx */
87
/* #define STM32F423xx */
88
#endif
89
90
/* Tip: To avoid modifying this file each time you need to switch between these
91
devices, you can define the device in your toolchain compiler preprocessor.
92
*/
93
#if !defined(USE_HAL_DRIVER)
99
/*#define USE_HAL_DRIVER */
100
#endif
/* USE_HAL_DRIVER */
101
105
#define __STM32F4xx_CMSIS_VERSION_MAIN (0x02U)
106
#define __STM32F4xx_CMSIS_VERSION_SUB1 (0x06U)
107
#define __STM32F4xx_CMSIS_VERSION_SUB2 (0x09U)
108
#define __STM32F4xx_CMSIS_VERSION_RC (0x00U)
109
#define __STM32F4xx_CMSIS_VERSION ((__STM32F4xx_CMSIS_VERSION_MAIN << 24) | (__STM32F4xx_CMSIS_VERSION_SUB1 << 16) | (__STM32F4xx_CMSIS_VERSION_SUB2 << 8) | (__STM32F4xx_CMSIS_VERSION_RC))
110
114
118
119
#if defined(STM32F405xx)
120
#include "stm32f405xx.h"
121
#elif defined(STM32F415xx)
122
#include "stm32f415xx.h"
123
#elif defined(STM32F407xx)
124
#include "stm32f407xx.h"
125
#elif defined(STM32F417xx)
126
#include "stm32f417xx.h"
127
#elif defined(STM32F427xx)
128
#include "stm32f427xx.h"
129
#elif defined(STM32F437xx)
130
#include "stm32f437xx.h"
131
#elif defined(STM32F429xx)
132
#include "stm32f429xx.h"
133
#elif defined(STM32F439xx)
134
#include "
stm32f439xx.h
"
135
#elif defined(STM32F401xC)
136
#include "stm32f401xc.h"
137
#elif defined(STM32F401xE)
138
#include "stm32f401xe.h"
139
#elif defined(STM32F410Tx)
140
#include "stm32f410tx.h"
141
#elif defined(STM32F410Cx)
142
#include "stm32f410cx.h"
143
#elif defined(STM32F410Rx)
144
#include "stm32f410rx.h"
145
#elif defined(STM32F411xE)
146
#include "stm32f411xe.h"
147
#elif defined(STM32F446xx)
148
#include "stm32f446xx.h"
149
#elif defined(STM32F469xx)
150
#include "stm32f469xx.h"
151
#elif defined(STM32F479xx)
152
#include "stm32f479xx.h"
153
#elif defined(STM32F412Cx)
154
#include "stm32f412cx.h"
155
#elif defined(STM32F412Zx)
156
#include "stm32f412zx.h"
157
#elif defined(STM32F412Rx)
158
#include "stm32f412rx.h"
159
#elif defined(STM32F412Vx)
160
#include "stm32f412vx.h"
161
#elif defined(STM32F413xx)
162
#include "stm32f413xx.h"
163
#elif defined(STM32F423xx)
164
#include "stm32f423xx.h"
165
#else
166
#error "Please select first the target STM32F4xx device used in your application (in stm32f4xx.h file)"
167
#endif
168
172
176
typedef
enum
{
177
RESET = 0U,
178
SET = !RESET
179
} FlagStatus,
180
ITStatus;
181
182
typedef
enum
{
183
DISABLE = 0U,
184
ENABLE = !DISABLE
185
} FunctionalState;
186
#define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
187
188
typedef
enum
{
189
SUCCESS = 0U,
190
ERROR = !SUCCESS
191
} ErrorStatus;
192
196
200
#define SET_BIT(REG, BIT) ((REG) |= (BIT))
201
202
#define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT))
203
204
#define READ_BIT(REG, BIT) ((REG) & (BIT))
205
206
#define CLEAR_REG(REG) ((REG) = (0x0))
207
208
#define WRITE_REG(REG, VAL) ((REG) = (VAL))
209
210
#define READ_REG(REG) ((REG))
211
212
#define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
213
214
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
215
216
/* Use of CMSIS compiler intrinsics for register exclusive access */
217
/* Atomic 32-bit register access macro to set one or several bits */
218
#define ATOMIC_SET_BIT(REG, BIT) \
219
do { \
220
uint32_t val; \
221
do { \
222
val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \
223
} while ((__STREXW(val, (__IO uint32_t *)&(REG))) != 0U); \
224
} while (0)
225
226
/* Atomic 32-bit register access macro to clear one or several bits */
227
#define ATOMIC_CLEAR_BIT(REG, BIT) \
228
do { \
229
uint32_t val; \
230
do { \
231
val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \
232
} while ((__STREXW(val, (__IO uint32_t *)&(REG))) != 0U); \
233
} while (0)
234
235
/* Atomic 32-bit register access macro to clear and set one or several bits */
236
#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
237
do { \
238
uint32_t val; \
239
do { \
240
val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
241
} while ((__STREXW(val, (__IO uint32_t *)&(REG))) != 0U); \
242
} while (0)
243
244
/* Atomic 16-bit register access macro to set one or several bits */
245
#define ATOMIC_SETH_BIT(REG, BIT) \
246
do { \
247
uint16_t val; \
248
do { \
249
val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \
250
} while ((__STREXH(val, (__IO uint16_t *)&(REG))) != 0U); \
251
} while (0)
252
253
/* Atomic 16-bit register access macro to clear one or several bits */
254
#define ATOMIC_CLEARH_BIT(REG, BIT) \
255
do { \
256
uint16_t val; \
257
do { \
258
val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \
259
} while ((__STREXH(val, (__IO uint16_t *)&(REG))) != 0U); \
260
} while (0)
261
262
/* Atomic 16-bit register access macro to clear and set one or several bits */
263
#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \
264
do { \
265
uint16_t val; \
266
do { \
267
val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
268
} while ((__STREXH(val, (__IO uint16_t *)&(REG))) != 0U); \
269
} while (0)
270
274
275
#if defined(USE_HAL_DRIVER)
276
// #include "stm32f4xx_hal.h"
277
#endif
/* USE_HAL_DRIVER */
278
279
#ifdef __cplusplus
280
}
281
#endif
/* __cplusplus */
282
283
#endif
/* __STM32F4xx_H */
287
stm32f439xx.h
CMSIS STM32F439xx Device Peripheral Access Layer Header File.
Australis-Avionics
Code
system
stm32f4xx.h
Generated by
1.13.2